The present disclosure relates to input/output circuits which are connected to an external signal line having a voltage higher than the power supply voltage of an LSI circuit.
In interfaces such as an inter-integrated circuit (I2C) bus, an external signal line (bus) of an LSI circuit is pulled up with a resistor, an input/output circuit having an open-drain circuit of an N-channel MOS transistor outputs only a low voltage, and a high voltage is obtained by a pull-up resistor at the terminal end. The pull-up resistor may pull a voltage up to a value (a maximum of 5 V) higher than the power supply voltage of the LSI circuit. Therefore, an input/output circuit which is connected to an external signal line having a voltage higher than the power supply voltage of the LSI circuit is essentially required. However, the voltage of the external signal line higher than the power supply voltage of the LSI circuit is likely to cause a problem with the reliability of the gate oxide film of the MOS transistor included in the input/output circuit, such as time-dependent dielectric breakdown (TDDB), hot carrier injection (HCl), etc.
To address the reliability problem, there is a known MOS transistor protective circuit having a stack structure which is conventionally used as an input/output circuit which is connected to an external signal line having a voltage higher than the power supply voltage of an LSI circuit. In addition, a single or a plurality of diodes or MOS transistor switches are connected between the gate and drain of a MOS transistor included in the protective circuit with a stack structure to accommodate a surge voltage (see Japanese Patent Publication No. 2001-160615).
However, in the above conventional input/output circuit, if a signal having a specific frequency is input to a pad for external connection, a problem arises with the reliability of the gate oxide film. Specifically, the gate voltage of a MOS transistor connected to the external connection pad is raised by a coupling capacitance between the drain and gate of the MOS transistor, so that the voltage of another MOS transistor in the stack structure which is connected in series to the MOS transistor connected to the external connection pad, is likely to exceed the breakdown level, and therefore, the gate oxide film is likely to be damaged.